• DocumentCode
    2853983
  • Title

    Circuit failure prediction to overcome scaled CMOS reliability challenges

  • Author

    Mitra, Subhasish ; Agarwal, Mridul

  • Author_Institution
    Depts. of Electr. Eng. & Comput. Sci., Stanford Univ., Stanford, CA
  • fYear
    2007
  • fDate
    21-26 Oct. 2007
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    Circuit failure prediction predicts the occurrence of a circuit failure before errors actually appear in system data and states. This is in contrast to traditional error detection where a failure is detected after errors appear in system data and states. Circuit failure prediction can be performed in multiple ways -the basic principle is to insert a wide variety of "sensors" at various locations inside a chip. These sensors collect information about various system parameters over time concurrently during normal system operation or during periodic on-line self-test.
  • Keywords
    CMOS integrated circuits; failure analysis; integrated circuit reliability; circuit failure prediction; scaled CMOS reliability; Aging; CMOS technology; Circuit testing; Costs; Data analysis; Delay; Error correction; Failure analysis; Fires; Stress;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2007. ITC 2007. IEEE International
  • Conference_Location
    Santa Clara, CA
  • ISSN
    1089-3539
  • Print_ISBN
    978-1-4244-1127-6
  • Electronic_ISBN
    1089-3539
  • Type

    conf

  • DOI
    10.1109/TEST.2007.4437665
  • Filename
    4437665