DocumentCode
285405
Title
A new VSLI architecture for rank order and stack filters
Author
Lucke, Lori E. ; Parhi, Keshab K.
Author_Institution
Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA
Volume
1
fYear
1992
fDate
10-13 May 1992
Firstpage
101
Abstract
A class two VLSI architecture for one-dimensional rank order filtering that has the size and latency advantages of the class two architectures and the pipelining advantages of the class one architectures is introduced. The new architecture is extended to handle recursive rank order filtering, two-stage rank order filtering, stack filtering, and two-dimensional rank order filtering
Keywords
VLSI; digital filters; pipeline processing; 2D filtering; VSLI architecture; latency; one-dimensional rank order filtering; pipelining advantages; recursive filtering; size; stack filtering; Boolean functions; Computer architecture; Filtering; Filters; Pipelines; Shift registers; Signal processing; Sorting; Stacking; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
Conference_Location
San Diego, CA
Print_ISBN
0-7803-0593-0
Type
conf
DOI
10.1109/ISCAS.1992.230004
Filename
230004
Link To Document