• DocumentCode
    2854572
  • Title

    Bare chip stacking structure for MCM production

  • Author

    Kimura, Tadashi ; Okuda, Osamu ; Ishikawa, Haruo ; Suzuki, Yoshinori ; Hodges, Charles R. ; Kim, Peter ; Nakajima, Kazu

  • Author_Institution
    Sumitomo Metal Min. Co. Ltd., Tokyo, Japan
  • fYear
    1998
  • fDate
    15-17 Apr 1998
  • Firstpage
    303
  • Lastpage
    307
  • Abstract
    In order to obtain higher density and lower cost multichip modules (MCM), we have developed a simply structured bare-die stacking assembly technology. It provides a simple structure with thick epoxy layer to fix upper layer bare die, rather than custom structures such as notched dies or additional electrodes at die edge in the conventional structures. The developed technology can use exactly the same dies as those for wire bonding interconnection without any additional processing. All electrical connections of the upper and lower dies are achieved by wire-bonding to the substrate independently. We have performed this stacking assembly by precise control of epoxy layer thickness and wire loop shapes. This new technology was applied to the production of MCMs, including twelve memory dies. The assembled MCM was almost twice as dense as an MCM without a stacked-die structure. The MCM were verified to functional correctly. The assembly yield of MCM with this structure was high enough for production. As our technology includes a repair method for failed dies, fully tested KGD (known good die) are not necessary
  • Keywords
    adhesion; integrated circuit interconnections; integrated circuit packaging; integrated circuit yield; lead bonding; maintenance engineering; multichip modules; polymer films; MCM assembly yield; MCM production; MCM stacked-die structure; bare chip stacking structure; bare-die stacking assembly technology; electrical connections; epoxy layer; epoxy layer thickness; failed die repair method; known good die; memory dies; multichip modules; stacking assembly; upper layer bare die fixing; wire bonding interconnection; wire loop shape; wire-bonding; Assembly; Bonding; Costs; Electrodes; Multichip modules; Production; Shape control; Stacking; Thickness control; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multichip Modules and High Density Packaging, 1998. Proceedings. 1998 International Conference on
  • Conference_Location
    Denver, CO
  • Print_ISBN
    0-7803-4850-8
  • Type

    conf

  • DOI
    10.1109/ICMCM.1998.670798
  • Filename
    670798