DocumentCode :
2855535
Title :
F2-cPACTM-a manufacturing process for a low cost CSP
Author :
Kasulke, P. ; Oppert, T. ; Zakel, E. ; Titerle, L.
Author_Institution :
Packaging Technol. GmbH, Nauen, Germany
fYear :
1998
fDate :
15-17 Apr 1998
Firstpage :
330
Lastpage :
336
Abstract :
This paper presents a manufacturing line for a chip-size package. This CSP, called F2-cPACTM, is based on a flex circuit interposer. The entire package is 645 μm thick, including a 550 μm-thick chip and a 85 μm-thick tape carrier. For interconnection and redistribution of the chip I/Os, a three layer tape with gold or gold/nickel surface finish on the copper layer is used. Mechanical stability between the tape and the chip is achieved using a low stress adhesive. 63Sn/37Pb solder balls on the bottom side enable CSP attach to the board. For assembly, a new manufacturing line is established. The IC bumping process is done at wafer level. A very cost effective pretreatment method is to coat the Al IC pads with electroless Ni/Au. Besides the cost advantage of this process, a very high layer uniformity and a near hermetic sealing of the Al-pad is achieved. Subsequently, a novel process is used to apply a 10 μm-thin layer of AuSn20 solder to the Ni pads on the wafer. Interconnection of the bare die to the flex interposer is performed with a reel-to-reel chip-on-flex laser bonder. This bonder has the option to use a single fibre or multifibre bondhead. With the multifibre bondhead, the high speed bonder can be implemented in a fully-automatic production line. The advantage of this bonder system is the capability of bonding through the flex tape. Solder balls for CSP attach to the board are applied using a fluxless system for solder ball placement and controlled laser reflow. The package is fully surface mount compatible, allowing a wide process window
Keywords :
adhesion; integrated circuit interconnections; integrated circuit metallisation; integrated circuit packaging; laser materials processing; mechanical stability; microassembling; reflow soldering; seals (stoppers); surface mount technology; 10 micron; 550 micron; 645 micron; 85 micron; Al; Al IC pads; Au-Cu; AuSn solder; AuSn-Ni-Au-Al; CSP attach; Cu; F2-cPAC chip size package; Ni pads; Ni-Au-Cu; SnPb; SnPb solder balls; assembly; automatic production line; bare die/flex interposer interconnection; chip I/O interconnection; chip I/O redistribution; chip-size package; controlled laser reflow; copper layer; cost effective pretreatment method; electroless Ni/Au coating; flex circuit interposer; flex tape; fluxless system; gold surface finish; gold/nickel surface finish; hermetic sealing; layer uniformity; low cost CSP; low stress adhesive; manufacturing line; manufacturing process; mechanical stability; multifibre bondhead; multilayer tape interconnection; package thickness; process window; reel-to-reel chip-on-flex laser bonder; single fibre bondhead; solder ball placement; solder balls; surface mount compatibility; tape carrier; wafer level IC bumping process; Chip scale packaging; Copper; Costs; Flexible electronics; Gold; Integrated circuit interconnections; Nickel; Pulp manufacturing; Surface finishing; Wafer bonding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multichip Modules and High Density Packaging, 1998. Proceedings. 1998 International Conference on
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-4850-8
Type :
conf
DOI :
10.1109/ICMCM.1998.670803
Filename :
670803
Link To Document :
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