DocumentCode
2856058
Title
A Test Scheduling Scheme for Core-Based SoCs Using Genetic Algorithm
Author
Jinyu, Zhan ; Xunsheng, Li ; Bing, Guo ; Guangze, Xiong ; Nan, Sang
Author_Institution
Coll. of Comput. Sci. & Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu
fYear
2008
fDate
29-31 July 2008
Firstpage
38
Lastpage
43
Abstract
We present a test scheduling scheme for core-based system-on-chips based on genetic algorithm. Given a set of tasks (test sets for the cores), a set of test resources(e.g., test buses) and a test access architecture, test scheduling is determined for the cores such that the total test application time is minimized. A genetic algorithm model for optimal test scheduling is proposed. To make the solution process more stable and the results nearer to optimal solution, differential evolution and self-adaptive mutation are brought into the traditional genetic algorithm. Compared with the integer linear programming formulation of similar problems, our approach provides more optimal experimental results, and is more suitable to test the large-scale SoCs successfully.
Keywords
genetic algorithms; integrated circuit testing; scheduling; system-on-chip; core-based SoCs; core-based system-on-chips; differential evolution; genetic algorithm; integer linear programming; optimal test scheduling; self-adaptive mutation; test access architecture; test scheduling scheme; Automatic testing; Electronic equipment testing; Genetic algorithms; Genetic mutations; Job shop scheduling; Large-scale systems; Pins; Processor scheduling; Software testing; System testing; Differential evolution; genetic Algorithm; system on chip(SoC); test access mechanism; test scheduling.;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Software and Systems Symposia, 2008. ICESS Symposia '08. International Conference on
Conference_Location
Sichuan
Print_ISBN
978-0-7695-3288-2
Type
conf
DOI
10.1109/ICESS.Symposia.2008.65
Filename
4627128
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