• DocumentCode
    2856491
  • Title

    An ILP formulation for reliability-oriented high-level synthesis

  • Author

    Tosun, S. ; Ozturk, O. ; Mansouri, N. ; Arvas, E. ; Kandemir, M. ; Xie, Y. ; Hung, W.-L.

  • Author_Institution
    Syracuse Univ., NY, USA
  • fYear
    2005
  • fDate
    21-23 March 2005
  • Firstpage
    364
  • Lastpage
    369
  • Abstract
    Reliability decisions taken early in system design can bring significant benefits in terms of design quality. This paper presents a 0-1 integer linear programming (ILP) formulation for reliability-oriented high-level synthesis that addresses the soft error problem. The proposed approach tries to maximize reliability of the design while observing the bounds on area and performance, and makes use of our reliability characterization of hardware components such as adders and multipliers. We implemented the proposed approach, performed experiments with several example designs, and compared the results with those obtained by a prior proposal. Our results show that incorporating reliability as a first-class metric during high-level synthesis brings significant improvements on the overall design reliability.
  • Keywords
    VLSI; adders; high level synthesis; integer programming; integrated circuit design; integrated circuit reliability; linear programming; ILP formulation; VLSI; adders; design quality; integer linear programming; multipliers; reliability-oriented high-level synthesis; soft error problem; Adders; Circuit faults; Combinational circuits; Computer errors; Embedded system; Hardware; High level synthesis; Integer linear programming; Neutrons; Single event upset;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality of Electronic Design, 2005. ISQED 2005. Sixth International Symposium on
  • Print_ISBN
    0-7695-2301-3
  • Type

    conf

  • DOI
    10.1109/ISQED.2005.15
  • Filename
    1410610