• DocumentCode
    2856624
  • Title

    Performance simulation with circuit level models

  • Author

    Freedman, Daniel ; Patel, Mitesh

  • Author_Institution
    IBM System Developmant Div., Manassas, VA, USA
  • Volume
    XVII
  • fYear
    1974
  • fDate
    15-13 Feb. 1974
  • Firstpage
    40
  • Lastpage
    41
  • Abstract
    This paper will present a technique for simulation of large circuit configurations using circuit level modeling which converts integro-differential equations to simple algebraics. A configuration of 1300 interconnected FET logic circuits has been analyzed using this approach.
  • Keywords
    Central Processing Unit; Circuit analysis; Circuit analysis computing; Circuit simulation; Electrical resistance measurement; FET circuits; Flexible printed circuits; Integrodifferential equations; Solid modeling; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1974 IEEE International
  • Conference_Location
    Philadelphia, PA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1974.1155261
  • Filename
    1155261
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2856624