FASVQ: a feasible vector quantization architecture

Author

Huang, Steve Shih-Yu ; Liu, Huai-Jen ; Wang, Jia-Shung ; Chen, Wen-Tsuen

Author_Institution

Inst. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan

Volume

5

fYear

1992

fDate

10-13 May 1992

Firstpage

2296

Abstract

Image encoding using a new high-speed and high-quality FASVQ (filtering and seeking vector quantization) architecture is proposed. The FASVQ coding scheme consists of three phases. The first and the second phases look like a filter which prune away those codevectors with larger distortions through a single cost estimation function. The third selects exhaustively the minimum distortion codevector within a fixed number of candidates suggested in the first and the second phases. This architecture can realize an environment with a frame rate of thirty 512×512 YUV (4:1:1) color image frames per second. The results of simulation for this coding scheme are presented

Keywords

computer architecture; image coding; vector quantisation; FASVQ coding scheme; cost estimation function; filtering/seeking VQ architecture; minimum distortion codevector; three-stage pipelined architecture; vector quantization architecture; Clocks; Color; Computer architecture; Computer science; Hardware; Image storage; Transmitters; Tree data structures; Vector quantization; Video compression;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0593-0

Type

conf

DOI

10.1109/ISCAS.1992.230500

Filename

230500