DocumentCode
2857570
Title
A generic platform for remote accelerated tests and high altitude SEU experiments on advanced ICs: Correlation with MUSCA SEP3 calculations
Author
Hubert, Guillaume ; Velazco, Raoul ; Peronnard, Paul
Author_Institution
ONERA-CERT, France
fYear
2009
fDate
24-26 June 2009
Firstpage
180
Lastpage
180
Abstract
The goal of this work is to confront SER predictions done with MUSCA SEP3 to measures performed at high altitude (in commercial planes) by means a generic and flexible experimental testboard developed by TIMA. In this case the testboard was a memory architecture of 1 Gigabit made from SRAMs issued from two successive generations, 130 nm and 90 nm, respectively named models 1 and 2 in the following.
Keywords
SRAM chips; integrated circuit testing; MUSCA SEP3 calculations; SRAM; TIMA; advanced integrated circuit; generic platform; high altitude SEU experiments; memory architecture; remote accelerated tests; size 130 nm; size 90 nm; storage capacity 1 Gbit; Circuit testing; Integrated circuit modeling; Integrated circuit packaging; Integrated circuit technology; Life estimation; Metallization; Neutrons; Passivation; Predictive models; Single event upset;
fLanguage
English
Publisher
ieee
Conference_Titel
On-Line Testing Symposium, 2009. IOLTS 2009. 15th IEEE International
Conference_Location
Sesimbra, Lisbon
Print_ISBN
978-1-4244-4596-7
Electronic_ISBN
978-1-4244-4595-0
Type
conf
DOI
10.1109/IOLTS.2009.5196005
Filename
5196005
Link To Document