• DocumentCode
    2857682
  • Title

    A New Memory Module for COTS-Based Personal Supercomputing

  • Author

    Tanabe, Noboru ; Nakatake, Masasige ; Hakozaki, Hirotaka ; Dohi, Yasunori ; Nakajo, Hironori ; Amano, Hideharu

  • Author_Institution
    Toshiba
  • fYear
    2004
  • fDate
    12-14 Jan. 2004
  • Firstpage
    40
  • Lastpage
    48
  • Abstract
    This paper presents how to make inexpensive personal supercomputers getting the merit of commercial-off-the-shelf (COTS) continuously after the death of vector super-computer venders. It is designed to realize this goal without any modification on CPU, bridge chips on motherboard and memory chips. Only plugging a new memory module with vector load/store function make an inexpensive home-use personal computer into a node similar to Earth simulator´s one. These nodes can be connected by COTS Infiniband 4X type or 12X type switches in order to make parallel systems. COTS SO-DIMMs on the memory modules can be accessed fastly by remote nodes by using AOTF, BOTF, RDMA and remote vector load / store operations. Applications with unit striding or indexed accesses are going to be accelerated. How to accelerate NAS CG class B is shown as an example. Used evaluation methodlogy is about 500 times faster than that of SimpleScalar based methodology. It is predicted with bandwidth analysis that up to 8.75 times improvement can be achieved by proposed system for a single CPU Pentium4 PC without parallel processing
  • Keywords
    memory architecture; microcomputers; multiprocessing systems; parallel architectures; personal computing; 12X type switches; AOTF; BOTF; COTS Infiniband 4X type; COTS SO-DIMMs; CPU Pentium4 PC; Earth simulator; RDMA; SimpleScalar; bandwidth analysis; bridge chips; memory chips; memory module; memory modules; motherboard; parallel processing; parallel systems; personal supercomputing; remote vector load; store function; Acceleration; Bandwidth; Bridges; Character generation; Computational modeling; Computer simulation; Earth; Microcomputers; Supercomputers; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Innovative Architecture for Future Generation High-Performance Processors and Systems, 2004. Proceedings
  • Conference_Location
    Maui, HI
  • ISSN
    1537-3223
  • Print_ISBN
    0-7695-2205-X
  • Type

    conf

  • DOI
    10.1109/IWIA.2004.10019
  • Filename
    1410679