• DocumentCode
    285789
  • Title

    Feasibility of synchronous pulse-density modulation arithmetic in integrated circuit implementations of artificial neural networks

  • Author

    Tomberg, Jouni ; Kaski, Kimmo

  • Author_Institution
    Dept. of Electr. Eng., Tampere Univ. of Technol., Finland
  • Volume
    5
  • fYear
    1992
  • fDate
    10-13 May 1992
  • Firstpage
    2232
  • Abstract
    The major goal is to find an effective method to implement artificial neural network structures on VLSI circuits. Pulse-density modulation (PDM) arithmetic offers a new interesting method to implement artificial neural network structures on silicon. The advantage is simple arithmetic structures leading to small area on silicon and thus larger networks on a single circuit. The pulse-density modulation technique in a restricted sense mimics the biological idea of neuron action using both analog and digital structures. The synchronous PDM-technique, PDM arithmetic and structures, and VLSI implementations are discussed. The data format causes some new restrictions for the overall architecture of the circuits
  • Keywords
    VLSI; mixed analogue-digital integrated circuits; multiplying circuits; neural chips; pulse modulation; VLSI circuits; analogue structure; artificial neural networks; data format; digital structures; integrated circuit implementations; multiplier structures; synchronous pulse-density modulation arithmetic; Arithmetic; Artificial neural networks; Biological system modeling; Information processing; Integrated circuit technology; Intelligent networks; Neurons; Pulse circuits; Pulse modulation; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
  • Conference_Location
    San Diego, CA
  • Print_ISBN
    0-7803-0593-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1992.230546
  • Filename
    230546