DocumentCode
2859941
Title
A monostable CMOS RAM with self-refresh mode
Author
Shiga, K. ; Itoh, Takayuki ; Anbe, T.
Author_Institution
Matsushita Research Institute Tokyo, Inc., Kawasaki, Japan
Volume
XIX
fYear
1976
fDate
18-20 Feb. 1976
Firstpage
134
Lastpage
135
Abstract
A self-refresh memory cell, consisting of a monostable flip-flop, instead of a bistable model,using four transistors and two interconnected lines, will be described. Chip area per bit is comparable with conventional 3-transistor dynamic RAM.
Keywords
Circuit testing; Computer simulation; Energy consumption; Hardware; Large-scale systems; MOSFETs; Power measurement; Random access memory; Read-write memory; Variable structure systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1976.1155479
Filename
1155479
Link To Document