Title :
A masterslice LSI for subnanosecond random logic
Author :
Braeckelmann, W. ; Fritzsche, H. ; Kroos, F. ; Trinkl, W. ; Wilhelm, W.
Author_Institution :
Siemens AG, Munich, Germany
Keywords :
Delay; Large scale integration; Latches; Logic circuits; Logic design; Multiplexing; Pins; Power dissipation; Resistors; Wiring;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1977 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1977.1155689
