DocumentCode
2868544
Title
A 40-to-44Gb/s 3Ã\x97 Oversampling CMOS CDR/1:16 DEMUX
Author
Nedovic, Nikola ; Tzartzanis, Nestoras ; Tamura, Hirotaka ; Rotella, Francis ; Wiklund, Magnus ; Mizutani, Yuma ; Okaniwa, Yusuke ; Kuroda, Tadahiro ; Ogawa, Junji ; Walker, William
Author_Institution
Fujitsu Labs. of America, Sunnyvale, CA
fYear
2007
fDate
11-15 Feb. 2007
Firstpage
224
Lastpage
598
Abstract
A 3times oversampling CDR and 1:16 DEMUX occupies 0.8 times 1.8mm2 in a 90nm CMOS process. The chip operates at 40 to 44Gb/s and dissipates 0.91W. Input data is sampled using a 24-phase distributed VCO and a digital CDR recovers 16 bits and a 2.5GHz clock from 48 demultiplexed samples spanning 16UI. Conformance to the ITU G.8251 jitter tolerance mask (BER <10-12 with a 231 - 1 PRBS source) is demonstrated.
Keywords
CMOS integrated circuits; demultiplexing equipment; digital circuits; 0.91 W; 2.5 GHz; 24-phase distributed VCO; 90 nm; CMOS process; DEMUX; digital CDR; oversampling CMOS; Bit error rate; Charge pumps; Circuit simulation; Clocks; Discrete event simulation; Filters; Germanium silicon alloys; Jitter; Silicon germanium; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0853-9
Electronic_ISBN
0193-6530
Type
conf
DOI
10.1109/ISSCC.2007.373375
Filename
4242346
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