FD-TLM electromagnetic field simulation of high-speed III-V heterojunction bipolar transistor digital logic gates

The finite-difference transmission line matrix (FD-TLM) method allows us to model the electromagnetic behavior of a circuit based on material properties and package dimensions, without the necessity of circuit parasitic extraction. In this paper we extend the FD-TLM method to model micron-scale heterojunction bipolar transistors (HBTs) enabling us to perform time-domain, three-dimensional full-wave analysis of high-speed digital circuits containing HBTs. The accuracy of our HBT model is established by comparing with results of SPICE simulation using the modified Gummel-Poon BJT model. We present simulation results of a two-stage resistor-transistor logic (RTL) inverter chain and also a current-mode logic (CML) buffer circuit and compare the FD-TLM simulation result with SPICE. By keeping the interconnect lengths short, we ensure a fair comparison between the two simulation methods