DocumentCode
2869438
Title
A High-Density Subthreshold SRAM with Data-Independent Bitline Leakage and Virtual Ground Replica Scheme
Author
Kim, Tae-Hyoung ; Liu, Jason ; Keane, John ; Kim, Chris H.
Author_Institution
Minnesota Univ., Minneapolis, MN
fYear
2007
fDate
11-15 Feb. 2007
Firstpage
330
Lastpage
606
Abstract
A 10T SRAM cell with data-independent bitline leakage and a virtual-ground replica scheme allows 1k cells per bitline in subthreshold SRAMs. Reverse short-channel effect is used to improve writability, offer higher speed, reduce junction capacitance, and decrease circuit variability. A 0.13mum, the 480kb SRAM test chip shows a minimum operating voltage of 0.20V.
Keywords
CMOS memory circuits; SRAM chips; low-power electronics; 0.13 micron; 0.20 V; 10T SRAM; 480 kbyte; data-independent bitline leakage; reverse short-channel effect; subthreshold SRAM; virtual-ground replica; writability improvement; CMOS technology; Circuits; Decoding; Delay; Land surface temperature; Leakage current; MOSFETs; Random access memory; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0853-9
Electronic_ISBN
0193-6530
Type
conf
DOI
10.1109/ISSCC.2007.373428
Filename
4242399
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