• DocumentCode
    2869745
  • Title

    Circuit Techniques to Enable 430Gb/s/mm2 Proximity Communication

  • Author

    Hopkins, David ; Chow, Alex ; Bosnyak, Robert ; Coates, Bill ; Ebergen, Jo ; Fairbanks, Scott ; Gainsley, Jon ; Ho, Ron ; Lexau, Jon ; Liu, Frankie ; Ono, Tarik ; Schauer, Justin ; Sutherland, Ivan ; Drost, Robert

  • Author_Institution
    Sun Microsystems Labs., Menlo Park, CA
  • fYear
    2007
  • fDate
    11-15 Feb. 2007
  • Firstpage
    368
  • Lastpage
    609
  • Abstract
    Two chips communicate over a capacitively-coupled I/O link at 1.8Gb/s/ch. Channels are placed on a 36mum pitch. 144 channels operate simultaneously for an aggregate bandwidth of 260Gb/s, or 430Gb/s/mm2 in 0.18mum CMOS. Measured energy consumption is 3.0pJ/b and BER is <10-15. Electronic alignment and crosstalk rejection allow reliable I/O for practical implementation
  • Keywords
    CMOS integrated circuits; integrated circuit interconnections; 0.18 micron; 36 micron; CMOS circuit; capacitively-coupled I/O link; circuit techniques; crosstalk rejection; electronic alignment; proximity communication; Bit error rate; Circuits; Clocks; Costs; Crosstalk; Multiplexing; Noise cancellation; Semiconductor device measurement; Threshold voltage; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    1-4244-0853-9
  • Electronic_ISBN
    0193-6530
  • Type

    conf

  • DOI
    10.1109/ISSCC.2007.373447
  • Filename
    4242418
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2869745