DocumentCode :
2871548
Title :
Integrating formal methods tools to support system design
Author :
Chin, Shiu Kai ; Faust, John ; Giordano, Joseph
Author_Institution :
Dept. of Electr. & Comput. Eng., Syracuse Univ., NY, USA
fYear :
1995
fDate :
6-10 Nov 1995
Firstpage :
88
Lastpage :
95
Abstract :
System engineering requires design and verification at several levels of abstraction-from top-level process descriptions down to gate-level hardware designs. A variety of tools such as specification languages, simulators, model checkers, theorem-provers, and other computer-aided design tools are used for designing and verifying systems. These tools must be integrated to support a continuous design flow. We report on the theoretical and practical aspects of integration and discuss our experience with specific tools
Keywords :
formal specification; specification languages; systems analysis; computer-aided design tools; formal methods tools integration; gate-level hardware designs; model checkers; simulators; specification languages; system design; system engineering; theorem-provers; top-level process descriptions; Carbon capture and storage; Design automation; Design engineering; Formal languages; Hardware; High speed integrated circuits; Logic functions; Specification languages; Systems engineering and theory; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Engineering of Complex Computer Systems, 1995. Held jointly with 5th CSESAW, 3rd IEEE RTAW and 20th IFAC/IFIP WRTP, Proceedings., First IEEE International Conference on
Conference_Location :
Ft. Lauderdale, FL
Print_ISBN :
0-8186-7123-8
Type :
conf
DOI :
10.1109/ICECCS.1995.479310
Filename :
479310
Link To Document :
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