DocumentCode
287442
Title
Design methodology and modeling of low inductance planar bus structures
Author
Skibinski, G.L. ; Divan, D.M.
fYear
1993
fDate
13-16 Sep 1993
Firstpage
98
Abstract
The minimization of undesirable parasitic inductance becomes vitally important given the dual constraints of higher frequency and higher power levels of modern power converters. This paper investigates the impedance of conventional conductor bus configurations and outlines a planar bus approach that results in extremely low inductance over a wide range of operating frequencies
fLanguage
English
Publisher
iet
Conference_Titel
Power Electronics and Applications, 1993., Fifth European Conference on
Conference_Location
Brighton
Type
conf
Filename
265164
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