DocumentCode :
2874702
Title :
Custom macro design in VLSI bipolar technology
Author :
Coleman, Jonathan ; Mathews, Kirk ; Yee-Ming Ting
Author_Institution :
IBM Corp., Kingston, NY, USA
Volume :
XXV
fYear :
1982
fDate :
10-12 Feb. 1982
Firstpage :
56
Lastpage :
57
Abstract :
A custom bipolar VLSI microprocessor chip will be discussed. Chip contains 4208 logic circuits, including 14 PLAs and a 13Kb ROM. The loaded average propagation delay per logic stage is 2.0 ns.
Keywords :
Delay; Logic circuits; Logic design; Programmable logic arrays; Read only memory; Schottky diodes; Semiconductor diodes; Very large scale integration; Wire; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
Conference_Location :
San Francisco, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1982.1156367
Filename :
1156367
Link To Document :
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