Title :
ARTEST: AN ARCHITECTURAL LEVEL TEST GENERATOR FOR DATA PATH FAULTS AND CONTROL FAULTS
Author :
Lee, Jaushin ; Patel, Janak H.
Keywords :
Automatic test pattern generation; Circuit faults; Circuit synthesis; Circuit testing; Control systems; High performance computing; Libraries; Sequential analysis; System testing; Very large scale integration;
Conference_Titel :
Test Conference, 1991, Proceedings., International
Print_ISBN :
0-8186-9156-5
DOI :
10.1109/TEST.1991.519738
