DocumentCode
2877366
Title
Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks
Author
Ashar, Pranav ; Devadas, Srinivas ; Keutzer, Kurt
fYear
1991
fDate
26-30 Oct 1991
Firstpage
887
Keywords
Binary decision diagrams; Boolean functions; Circuit faults; Circuit synthesis; Circuit testing; Data structures; Logic testing; Network synthesis; Redundancy; Robustness;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1991, Proceedings., International
ISSN
1089-3539
Print_ISBN
0-8186-9156-5
Type
conf
DOI
10.1109/TEST.1991.519755
Filename
519755
Link To Document