DocumentCode
2879462
Title
A bulk CMOS 20MS/s 7b flash ADC
Author
Fujita, Y. ; Masuda, E. ; Sakamoto, S. ; Sakaue, T. ; Sato, Y.
Author_Institution
Toshiba Microelectronics Center, Kawasaki, Japan
Volume
XXVII
fYear
1984
fDate
22-24 Feb. 1984
Firstpage
56
Lastpage
57
Abstract
A 3.5μm bulk CMOS Si-gate process applied to the design of a 20MS/s flash A/D converter powered by a single 5V supply, will be reported. By employing non-sampling amplifiers in a comparator array, 7b accuracy has been achieved with a power dissipation of 150mW.
Keywords
CMOS technology; Choppers; Circuits; Clocks; Linearity; Parasitic capacitance; Propagation delay; Sampling methods; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1984 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1984.1156643
Filename
1156643
Link To Document