DocumentCode :
2881626
Title :
Ultra low power FPGA-based architecture for Wake-up Radio in Wireless Sensor Networks
Author :
Rosello, V. ; Portilla, J. ; Riesgo, T.
Author_Institution :
Centro de Electron. Ind., Univ. Politec. de Madrid, Madrid, Spain
fYear :
2011
fDate :
7-10 Nov. 2011
Firstpage :
3826
Lastpage :
3831
Abstract :
In this paper the capabilities of ultra low power FPGAs to implement Wake-up Radios (WuR) for ultra low energy Wireless Sensor Networks (WSNs) are analyzed. The main goal is to evaluate the utilization of very low power configurable devices to take advantage of their speed, flexibility and low power consumption instead of the more common approaches based on ASICs or microcontrollers. In this context, energy efficiency is a key aspect, considering that usually the instant power consumption is considered a figure of merit, more than the total energy consumed by the application.
Keywords :
application specific integrated circuits; field programmable gate arrays; microcontrollers; wireless sensor networks; ASIC; WSN; WuR; energy efficiency; figure of merit; low power configurable devices; microcontrollers; power consumption; ultralow power FPGA-based architecture; wake-up radio; wireless sensor networks; Field programmable gate arrays; Hardware; Low power electronics; Microcontrollers; Power demand; Receivers; Wireless sensor networks; On-demand communicaitons; Wake-up radio; Wireless Sensor Networs; addressing capabilities; energy efficiency; low power FPGA;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
IECON 2011 - 37th Annual Conference on IEEE Industrial Electronics Society
Conference_Location :
Melbourne, VIC
ISSN :
1553-572X
Print_ISBN :
978-1-61284-969-0
Type :
conf
DOI :
10.1109/IECON.2011.6119933
Filename :
6119933
Link To Document :
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