Fast prototyping complex digital systems: a case study using Reed-Solomon codes

This paper has considered the prototyping of a (31, 9) RS codec using FPGAs. It has been shown that using FPGAs in this role allows for fast, flexible and cheap prototypes to be produced. Unfortunately due to the complexity of the design four FPGAs were required to implement the codec and this prohibited the use of FPGAs as the target architecture on which to embed the codecs. It has also been shown that these FPGAs did demonstrate a number of limitations as RS codec development tools, namely their levels of hardware, their preference for bit-serial architectures and the manner in which combinational logic was implemented