• DocumentCode
    288236
  • Title

    Using Handel to accelerate systems development

  • Author

    Page, Ian ; Randall, Geoff

  • Author_Institution
    Comput. Lab., Oxford Univ., UK
  • fYear
    1994
  • fDate
    34487
  • Firstpage
    42491
  • Lastpage
    42495
  • Abstract
    The Handel compiler, based on an Occam subset, is intended to exploit the expressive power of contemporary software engineering technology to rapidly generate high confidence net-list descriptions. These, once placed and routed, make efficient use of the target hardware (currently Xilinx FPGAs). This process is illustrated
  • Keywords
    Occam; circuit layout CAD; field programmable gate arrays; logic CAD; network routing; Handel compiler; Occam subset; Xilinx FPGAs; net-list descriptions; placement; routing; software engineering technology; target hardware;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Fast Prototyping of IC Designs, IEE Colloquium on
  • Conference_Location
    London
  • Type

    conf

  • Filename
    369896
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=288236