DocumentCode :
2882974
Title :
Sleep Transistor Design and Implementation - Simple Concepts Yet Challenges To Be Optimum
Author :
Shi, Kaijian ; Howard, David
Author_Institution :
Synopsys Inc., Dallas, TX
fYear :
2006
fDate :
26-28 April 2006
Firstpage :
1
Lastpage :
4
Abstract :
Optimum sleep transistor design and implementation are critical to a successful power-gating design. This paper describes a number of critical considerations for the sleep transistor design and implementation including header or footer switch selection, sleep transistor distribution choices and sleep transistor gate length, width and body bias optimization for area, leakage and efficiency
Keywords :
integrated circuit design; transistors; body bias optimization; footer switch selection; header switch selection; power-gating design; sleep transistor; Cellular phones; Circuits; Design optimization; Emergency power supplies; MOS devices; Power supplies; Signal design; Sleep; Switches; Variable structure systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, Automation and Test, 2006 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
1-4244-0179-8
Electronic_ISBN :
1-4244-0180-1
Type :
conf
DOI :
10.1109/VDAT.2006.258121
Filename :
4027493
Link To Document :
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