Fault tolerant techniques for memory components

Both manufacturers and users of memory components now accept the use of redundancy to improve yields. Currently, the most common practice is to replace defective elements by programming fusible links. As memory densities increase and device physics contraints become more severe, fault tolerant techniques are likely to diversify. For example, on-chip error correction has been employed to correct both hard defects and soft errors. The alternative fault tolerant techniques, their merits and limitations, and their impact on the characteristics of future memory components will be discussed.