• DocumentCode
    2883161
  • Title

    An 85ns 1Mb DRAM in a plastic DIP

  • Author

    Inoue, Yasuyuki ; Murotani ; Fukuzoh, Y. ; Hayano, Koji ; Fujii, Teruya ; Minami, Kazuyuki ; Nakamura, Kentaro ; Kikuchi, Masashi

  • Author_Institution
    NEC Corp., Kawasaki, Japan
  • Volume
    XXVIII
  • fYear
    1985
  • fDate
    13-15 Feb. 1985
  • Firstpage
    238
  • Lastpage
    239
  • Abstract
    This paper will describe the application of an NMOS technology with trench capacitors and an additional polycide interconnect layer to develop a 43.2mm2circuit in a 300mil plastic DIP. A quasi four-bit wide test capability will also be discussed.
  • Keywords
    Artificial intelligence; Circuit testing; Current supplies; Decoding; Electronics packaging; MOS capacitors; Plastics; Random access memory; Read-write memory; Solid state circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
  • Conference_Location
    New York, NY, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1985.1156852
  • Filename
    1156852
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2883161