DocumentCode
2883284
Title
A high density CMOS process
Author
Luscher, R. ; De Zaldivar, J.
Author_Institution
Faselec AG/Philips, Zurich, Switzerland
Volume
XXVIII
fYear
1985
fDate
13-15 Feb. 1985
Firstpage
260
Lastpage
261
Abstract
A 3μ CMOS process yielding circuit densities comparable to 1.5μ design rules will be reported. The procedure was used to construct an 8b microcomputer for telecom use: clock frequency was 20MHz at 9V; 50k transistors were placed in an area of 31mm2.
Keywords
CMOS process; Circuit testing; MOS capacitors; Mesh generation; Oxidation; Production; Read only memory; Secondary generated hot electron injection; Silicon; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1985 IEEE International
Conference_Location
New York, NY, USA
Type
conf
DOI
10.1109/ISSCC.1985.1156860
Filename
1156860
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