Title :
Architecture of the neural network emulator KDNeuro-I
Author :
Wang, J. ; Wang, X.F. ; Wang, D.S. ; Chen, H.L. ; Zhuang, Z.Q.
Author_Institution :
Dept. of Electron. Eng., Univ. of Sci. & Technol. of China, Anhui, China
Abstract :
The authors introduce an artificial neural network emulator KDNeuro-I, which is implemented using four Digital Signal Processor modules (TMS320C25). KDNeuro-I´s hardware architecture, software environment and the neurocomputing on it are described
Keywords :
computerised signal processing; digital signal processing chips; neural nets; parallel architectures; DSP modules; KDNeuro-I; TMS320C25; artificial neural network emulator; hardware architecture; neurocomputing; parallel processing; software environment; Artificial neural networks; Assembly; Communication system control; Computer architecture; Control systems; Digital signal processors; Hardware; Neural networks; Neurons; Software debugging;
Conference_Titel :
Circuits and Systems, 1991. Conference Proceedings, China., 1991 International Conference on
Conference_Location :
Shenzhen
DOI :
10.1109/CICCAS.1991.184283
