• DocumentCode
    2884065
  • Title

    A CMOS electrically reprogrammable ASIC with multi-level random logic capabilities

  • Author

    Goetting, E. ; Revak, S. ; Jan, Zohaib

  • Author_Institution
    Exel Microelectronics, Incorporated, San Jose, CA, USA
  • Volume
    XXIX
  • fYear
    1986
  • fDate
    19-21 Feb. 1986
  • Firstpage
    244
  • Lastpage
    245
  • Abstract
    A 24-pin electrically-reprogrammable ASIC, implemented in CMOS EEPROM technology with two-layer polysilicon and two-layer metal, providing user logic complexity of 600-800 gate equivalents, will be described. Speeds of 15ns per internal logic level have been obtained with 50mW consumption.
  • Keywords
    Application specific integrated circuits; CMOS logic circuits; CMOS technology; EPROM; Flip-flops; Logic arrays; Logic circuits; Logic devices; Logic programming; Metallization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
  • Conference_Location
    Anaheim, CA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1986.1156901
  • Filename
    1156901
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2884065