DocumentCode
2885191
Title
A 32b single-chip microprocessor
Author
Shauchi Ong ; Hu Chao ; Mon-Yen Tsai ; Shih, Fu-Hung ; Hou, Junhui ; Lewis, Keith ; Tang, Ju ; Trempel, C. ; Hadsel, R. ; Hwa Yu ; McCormick, Patrick ; Davis, C. ; Diamond, A. ; Medve, T. ; Higham, Jonathan
Author_Institution
IBM Research Center, Yorktown Heights, NY, USA
Volume
XXIX
fYear
1986
fDate
19-21 Feb. 1986
Firstpage
28
Lastpage
29
Abstract
This paper will present a 32b single-chip microprocessor implementing 102 mainframe instructions and supporting the emulation of the rest of the instructions. The chip, 10mm × 10mm with 200,000 transistor sites, is designed for 10MHZ worst case and operates at 16MHZ with 3W dissipation.
Keywords
Automatic control; Decoding; Logic design; MOS devices; Microprocessors; Programmable logic arrays; Read only memory; Registers; Switches; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location
Anaheim, CA, USA
Type
conf
DOI
10.1109/ISSCC.1986.1156969
Filename
1156969
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