Is VLSI neural learning robust against circuit limitations?

An investigation is made of the tolerance of various in-circuit learning algorithms to component imprecision and other circuit limitations in artificial neural networks. Supervised learning mechanisms including backpropagation and contrastive Hebbian leaning, and unsupervised soft competitive learning are all shown to be tolerant of those levels of arithmetic inaccuracy, noise, nonlinearity, weight decay, and statistical variation from fabrication that the authors have experienced in 1.2 μm analog CMOS circuits employing Gilbert multipliers as the primary computational element. These learning circuits also function properly in the presence of offset errors in analog multipliers and adders, provided that the computed weight updates are constrained by the circuitry to be made only when they exceed certain minimum or threshold values. These results are also relevant for compact (low bit rate) digital implementations