Title :
A VLSI chip set for an integrated text and graphics video subsystem
Author :
Blake, William ; English, P. ; Forrester, N. ; Furlong, T. ; Rose, Rachel ; Watson, R.
Author_Institution :
Digital Equipment Corp., Hudson, MA, USA
Abstract :
A chip set for a 1024×864 pixel, 60Hz non-interlaced display will be reported. The set allows simultaneous display of text and graphics at throughput rates of 20,000-characters per second and 8-million pixels per second, respectively. Features include smooth scrolling, clipping, scaling and rotation. In 3.5μm NMOS, typical power dissipation is 2W per chip.
Keywords :
Graphics; Very large scale integration;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1986 IEEE International
Conference_Location :
Anaheim, CA, USA
DOI :
10.1109/ISSCC.1986.1156992
