FUSI Specific Yield Monitoring Enabling Improved Circuit Performance and Fast Feedback to Production

Author

Chiarella, T. ; Rosmeulen, M. ; Tigelaar, H. ; Kerner, C. ; Nackaerts, A. ; Ramos, J. ; Lauwers, A. ; Veloso, A. ; Jurczak, M. ; Rothschild, A. ; Witters, L. ; Yu, H. ; Kitt, J.A. ; Verbeeck, R. ; de Potter, M. ; Debusschere, I. ; Absil, P. ; Biesemans, S

Author_Institution

IMEC Kapeldreef 75, Leuven

fYear

2007

fDate

19-22 March 2007

Firstpage

33

Lastpage

36

Abstract

The integration of fully silicided gates on a high-k dielectric in a standard process flow offers a solid alternative to the conventional Poly/SiON devices. In this work, we provide an extensive analysis of the module yield extracted for such devices highlighting the need for specific additional alarm flags without which some integration problems might be overlooked. The impact at the circuit level is studied and supported by modeling work on simple ring-oscillators.

Keywords

high-k dielectric thin films; integrated circuit modelling; integrated circuit yield; oscillators; FUSI specific yield monitoring; alarm flags; circuit level modeling; circuit performance; fully silicided gates integration; high-k dielectrics; module yield analysis; ring-oscillators; standard process flow; Circuit optimization; Circuit testing; Delay; Feedback circuits; High-K gate dielectrics; Microelectronics; Monitoring; Performance evaluation; Production; Tellurium; FUSI; VT splitting; Yield; delay; power; ring-oscillator;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 2007. ICMTS '07. IEEE International Conference on

Conference_Location

Tokyo

Print_ISBN

1-4244-0781-8

Electronic_ISBN

1-4244-0781-8

Type

conf

DOI

10.1109/ICMTS.2007.374450

Filename

4252400