• DocumentCode
    2886732
  • Title

    Impact of Transitor Matching on Features of Digital Circuit Blocks

  • Author

    Schaper, U. ; Kodytek, T. ; Kamp, W. ; Künemund, R.

  • Author_Institution
    Infineon Technol. AG, Neubiberg
  • fYear
    2007
  • fDate
    19-22 March 2007
  • Firstpage
    78
  • Lastpage
    82
  • Abstract
    Digital circuit blocks are extracted from full custom digital circuits as units for test structures. The test structures are suited for a statistical evaluation of circuit features like the pre-charge of node voltages of fast decision circuits. A statistical evaluation is needed to account for process variations. The circuit characterization results allow a comparison with statistical device models. Circuit performance is often guaranteed by adding a constant value to a figure of merit as a margin. The constant margin procedure for the circuit performance can be replaced by realistic margins applying the characterization results.
  • Keywords
    CMOS digital integrated circuits; field effect transistors; integrated circuit design; integrated circuit testing; CMOS circuits; circuit characterization; circuit performance; circuit statistical evaluation; constant margin procedure; digital circuit blocks; fast decision circuits; nFET; node voltage; pFET; parallel test structure units; serial test structure units; statistical device models; transistor matching; Decision support systems; Digital circuits; Fiber reinforced plastics; Microelectronics; Quadratic programming; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronic Test Structures, 2007. ICMTS '07. IEEE International Conference on
  • Conference_Location
    Tokyo
  • Print_ISBN
    1-4244-0781-8
  • Electronic_ISBN
    1-4244-0781-8
  • Type

    conf

  • DOI
    10.1109/ICMTS.2007.374459
  • Filename
    4252409