DocumentCode
2887393
Title
Programmable stochastic computing: Embracing errors in architecture and design of processors and applications
Author
Kumar, Rakesh
Author_Institution
Center for Reliable and High-Performance Computing, University of Illinois at Urbana-Champaign, USA
fYear
2012
fDate
21-25 May 2012
Firstpage
372
Lastpage
372
Abstract
All of computing today relies on an abstraction where software expects hardware to behave flawlessly for all inputs, under all conditions. While this abstraction worked well historically, due to the relatively small magnitude of variations in hardware and environment, computing will increasingly be done with devices and circuits that are inherently stochastic because of how small they are, or whose behavior is stochastic due to manufacturing and environmental uncertainties. For such emerging circuits and devices, the cost of guaranteeing correctness through guardbanding will be prohibitive, and we may need to rethink the correctness specification hardware needs to meet. Such rethinking may become particularly compelling considering that a significant amount of power is wasted in guaranteeing reliability even for applications that are inherently error tolerant.
Keywords
error tolerance; stochastic computing;
fLanguage
English
Publisher
ieee
Conference_Titel
Collaboration Technologies and Systems (CTS), 2012 International Conference on
Conference_Location
Denver, CO, USA
Print_ISBN
978-1-4673-1381-0
Type
conf
DOI
10.1109/CTS.2012.6261078
Filename
6261078
Link To Document