Title :
Multi-chip packaging technology for VLSI-based systems
Author :
Levinstein, H. ; Bartlett, C. ; Bertram, W.
Author_Institution :
AT&T Bell Laboratories, Murray Hill, NJ, USA
Abstract :
A multichip packaging technology using silicon substrate and solder bump bonding will be presented. Compared to conventional packaging it affords three times the operating frequency. Additionally, packaged size and power dissipation are reduced by a factor of 7 and 30%, respectively.
Keywords :
Assembly systems; Capacitance; Cooling; Design automation; Dielectric substrates; Inductance; Lead; Packaging; Polyimides; Very large scale integration;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1987.1157100
