DocumentCode :
2888525
Title :
A 1ns Josephson 16b ALU
Author :
Kotani, Shinji ; Fujimaki, N. ; Imamura, Takashi ; Hasuo, S.
Author_Institution :
Fujitsu, Ltd., Atsugi, Japan
Volume :
XXX
fYear :
1987
fDate :
0-0 Feb. 1987
Firstpage :
60
Lastpage :
61
Abstract :
A Josephson ALU consisting of 900 variable threshold logic gates will be disclosed. The critical path delay which measures 1.05ns has been obtained at a power consumption of 7 5mW. The average gate delay on the 1.5×8.8mm ALU is estimated to be 11.5ps.
Keywords :
Adders; Circuits; Delay effects; Delay estimation; Josephson junctions; Niobium; Propagation delay; Resistors; Semiconductor device measurement; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1987.1157153
Filename :
1157153
Link To Document :
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