DocumentCode
2889013
Title
Development of ASIC datapath compilers for gate array designs
Author
Mitra, Blswadip ; Rao, Kameshwar ; Jha, Shantanu ; Bagherli, Jalal
Author_Institution
Texas Instrum. Pvt. Ltd., Bangalore, India
fYear
1991
fDate
4-8 Jan 1991
Firstpage
281
Lastpage
282
Abstract
The authors present a complete development flow of ASIC datapath compilers for gate array designs. The module design and usage flow for the parameterized datapath elements is described. The efficiency achieved through the use of a highly integrated design environment is highlighted
Keywords
application specific integrated circuits; circuit layout CAD; logic CAD; logic arrays; ASIC datapath compilers; CAD; gate array designs; integrated design environment; module design; parameterized datapath elements; Application specific integrated circuits; Character generation; Costs; Instruments; Silicon; Software design; Temperature; Test pattern generators; Timing; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1991. Proceedings., Fourth CSI/IEEE International Symposium on
Conference_Location
New Delhi
Print_ISBN
0-8186-2125-7
Type
conf
DOI
10.1109/ISVD.1991.185133
Filename
185133
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