• DocumentCode
    2889895
  • Title

    Non Return Mobile Logic Family

  • Author

    Pettenghi, Héctor ; Avedillo, María J. ; Quintana, José M.

  • Author_Institution
    Centro Nacional de Microelectron., Instituto de Microelectron. de Sevilla
  • fYear
    2007
  • fDate
    27-30 May 2007
  • Firstpage
    125
  • Lastpage
    128
  • Abstract
    Many logic circuit applications of RTDs are based on the monostable-bistable logic element (MOBILE). Cascaded MOBILE gates are operated in a pipelined fashion using a four phase overlapping clocking scheme. To improve the robustness of MOBILE networks, a simpler clock scheme is desirable. We have demonstrated that removing the return to a "precharge" voltage behaviour of conventional MOBILE gates, operation with a single phase clock scheme is possible. In this paper, a non return MOBILE logic family is described and its single phase operation shown. A comparison between return and non return gates is carried out showing that in addition to the simpler clock scheme required, speed and power-delay product improvements can be achieved with the proposed ones
  • Keywords
    clocks; logic gates; MOBILE gates; MOBILE networks; monostable-bistable logic element; nonreturn MOBILE logic family; nonreturn gates; precharge voltage behaviour; return gates; single phase clock scheme; Clocks; Diodes; Logic circuits; Logic devices; Microwave integrated circuits; Positron emission tomography; Resonant tunneling devices; Robustness; Switches; Voltage control; MOBILE; Resonant Tunneling Diodes; clock scheme; nanopipelining;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Print_ISBN
    1-4244-0920-9
  • Electronic_ISBN
    1-4244-0921-7
  • Type

    conf

  • DOI
    10.1109/ISCAS.2007.378237
  • Filename
    4252587