DocumentCode :
2889995
Title :
NLM-128, an Improved LM-Type Summation Generator with 2-Bit memories
Author :
Lee, HoonJae ; Sung, SangMin ; Kim, HyeongRag
Author_Institution :
Dept. Inf. Network Eng., Dongseo Univ., Busan, South Korea
fYear :
2009
fDate :
24-26 Nov. 2009
Firstpage :
577
Lastpage :
582
Abstract :
The NLM family of key stream generator is based on the LM-type summation generator. A nonlinear feedback shift register is added to the LM-type summation generator to provide a security enhancement. NLM-128, a specific cipher from the NLM family, is proposed. It takes a 128-bit key and a 128-bit initialization vector, has 258 bits of internal state, and achieves a security level of 128 bits. In this paper, we present the security analysis of NLM-128, including the resistance to known attacks against the summation generator and LM generator.
Keywords :
cryptography; shift registers; summing circuits; 128-bit initialization vector; 2-bit memories; NLM-128; improved LM-Type summation generator; key stream generator; nonlinear feedback shift register; security analysis; security enhancement; storage capacity 2 bit; Clocks; Computer applications; Cryptography; Electronic mail; Information technology; Internet; Linear feedback shift registers; Pervasive computing; Security; Shift registers; Berlekamp-Messey algorithm; LM generator; de Bruijn; stream cipher; summation generator;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Sciences and Convergence Information Technology, 2009. ICCIT '09. Fourth International Conference on
Conference_Location :
Seoul
Print_ISBN :
978-1-4244-5244-6
Electronic_ISBN :
978-0-7695-3896-9
Type :
conf
DOI :
10.1109/ICCIT.2009.110
Filename :
5367870
Link To Document :
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