• DocumentCode
    2895425
  • Title

    A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS

  • Author

    Quan, Shaolei ; Zhong, Freeman ; Liu, Wing ; Aziz, Pervez ; Jing, Tai ; Dong, Jen ; Desai, Chintan ; Gao, Hairong ; Garcia, Monica ; Hom, Gary ; Huynh, Tony ; Kimura, Hiroshi ; Kothari, Ruchi ; Li, Lijun ; Liu, Cathy ; Lowrie, Scott ; Ling, Kathy ; Malipa

  • Author_Institution
    LSI, Milpitas, CA, USA
  • fYear
    2011
  • fDate
    20-24 Feb. 2011
  • Firstpage
    348
  • Lastpage
    350
  • Abstract
    A robust transceiver designed for NRZ signaling beyond 10Gb/s over long-range physical media (including electrical backplanes, copper cables and optical modules) must contend with significant challenges from insertion loss, crosstalk, and reflection. For inter-symbol interference (ISI) cancellation, half-rate decision-feedback equalizer (DFE) with unrolled first tap is widely used to avoid noise amplification and to relax timing for data sampling/feedback. However, tap-unrolling increases slicer count and entails half-rate multiplexers eating into timing margin. To remove reflection-induced ISI due to impedance discontinuities in the media, the DFE must cover tap positions higher than 30UI which is beyond tap range of the DFEs reported in previous work.
  • Keywords
    CMOS analogue integrated circuits; decision feedback equalisers; interference suppression; intersymbol interference; transceivers; CMOS process; DFE; ISI cancellation; NRZ signaling; bit rate 1.0625 Gbit/s to 14.025 Gbit/s; floating-tap decision-feedback equalizer; full-rate source-series-terminated transmit driver; half-rate decision-feedback equalizer; half-rate multiplexer; insertion loss; intersymbol interference cancellation; multimedia transceiver; size 40 nm; CMOS integrated circuits; Clocks; Decision feedback equalizers; Driver circuits; Phase locked loops; Propagation losses; Transceivers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-61284-303-2
  • Type

    conf

  • DOI
    10.1109/ISSCC.2011.5746348
  • Filename
    5746348