Voltage-dividing potentiometer enhancements for high-precision feature placement metrology

Improvements to the design of a modified voltage-dividing potentiometer permit the measurement of the center-to-center separations of parallel features with residual errors well below 10 nm. The modified test structure offers fabrication robustness and a range of application advantages over alternative approaches. In earlier work describing this test structure, the measurements reported were offset by a substrate-dependent error attributed by modeling to certain imperfections in the replication of the inside corners of the intersection of voltage taps with the bridge of the test structure. The work described provides experimental confirmation of the model, and two alternative modified designs that eliminate the source of the error are presented. Measurements from all four designs demonstrated that the two modified configurations eliminated the substrate pattern replication errors to which the original design was vulnerable. The end result is a robust feature-placement metrology tool