DocumentCode
2899862
Title
Improved corner rounding method for trenched MOSFET
Author
Seng, Ng Hong
Author_Institution
X-FAB Sarawak Sdn. Bhd., Kuching, Malaysia
fYear
2010
fDate
Nov. 30 2010-Dec. 2 2010
Firstpage
1
Lastpage
3
Abstract
This paper suggests an improved method to round off the concave corners of the deep trenches formed by plasma etch. The corner rounding technique, sacrificial oxidation (SACOX) before gate oxidation, has been practiced on the shallow trench isolation (STI) to improve the CMOS leakage performance. However, the direct implementation of the SACOX on the deep trenched MOSFET having less than 0.5 um trench width is insufficient to eliminate the oxide thinning at the concave corners. The experimental results including the scanning electron microscopy (SEM) images are presented to illustrate how the sharp corners vanish. The concave corners are encompassed by a smooth layer of silicon dioxide served as a gate oxide for vertical trenched MOSFET. Electrical measurement shows that the breakdown voltage was improved by eliminating the gate oxide weak spots.
Keywords
CMOS integrated circuits; MOSFET; oxidation; scanning electron microscopy; silicon compounds; sputter etching; CMOS leakage performance; corner rounding method; deep trenched MOSFET; electrical measurement; gate oxidation; gate oxide weak spots elimination; oxide thinning; plasma etch; sacrificial oxidation; scanning electron microscopy imaging; shallow trench isolation; silicon dioxide; vertical trenched MOSFET; Logic gates; MOSFET circuits; Manufacturing; Oxidation; Silicon; Stress; Surface morphology;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Manufacturing Technology Symposium (IEMT), 2010 34th IEEE/CPMT International
Conference_Location
Melaka
ISSN
1089-8190
Print_ISBN
978-1-4244-8825-4
Type
conf
DOI
10.1109/IEMT.2010.5746769
Filename
5746769
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