Superintegrated smart access controller

Author

Kumar, Niraj ; Swami, Ravi ; Nimishakavi, H. ; Nobugaki, I. ; Sen, Anjan

Author_Institution

Zilog Inc., Campbell, CA, USA

fYear

1990

fDate

17-21 Sep 1990

Abstract

The smart access controller (SAC) integrated circuit is discussed. This chip has been designed to serve serial communication control applications such as terminals, printers, modems, and slave communication processes, for 8, 16- and 32-bit MPU-based systems. Enhancements and cost reductions of existing hardware using Z80/Z180 with Z8530/Z85C30 serial communication controller (SCC) applications are discussed. The SAC combines the Z80180 MPU, with a single channel, 4 channels of counter timer and two 8-bit general-purpose parallel I/O ports and includes features like low electromagnetic interference (EMI) and programmable interrupt priority daisy chain. The chip is implemented using megacell-based superintegration design methodology in 1.2 micron CMOS technology. The chip has 80000 transistors with a die size of 330×205 mils and is packaged in a 100-pin QFP package

Keywords

CMOS integrated circuits; VLSI; application specific integrated circuits; microcontrollers; packaging; 1.2 micron; 205 mil; 330 mil; 8 bit; 8 to 32 bit; CMOS technology; MPU-based systems; QFP; Z80180 MPU; Zilog; cost reductions; die size; features; low electromagnetic interference; megacell-based superintegration design methodology; modems; package; printers; programmable interrupt priority daisy chain; serial communication control applications; serial communication controller; slave communication processes; smart access controller; terminals; CMOS technology; Communication system control; Control systems; Costs; Counting circuits; Electromagnetic interference; Hardware; Modems; Packaging; Printers;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE

Conference_Location

Rochester, NY

Type

conf

DOI

10.1109/ASIC.1990.186099

Filename

186099