60 nm gate length Al2O3 / In0.53Ga0.47As gate-first MOSFETs using InAs raised source-drain regrowth

Given adequately low source/drain (S/D) access resistivity and dielectric interface trap density (R_access <; 50 Ω-μ, and D_it <; 2 · 10¹² cm^-2 eV^-1,2 respectively), InGaAs MOSFETs will provide greater on-state current than silicon MOSFETs at the same effective oxide thickness (EOT). The access resistance must be obtained in a self-aligned structure with a contacted gate pitch ~4 times the physical gate length (L_g), e.g. 116 nm at 32 nm L_g, while control of short channel effects demands that the S/D region depth be only a fraction of gate length; low-resistance, ultra-shallow fully self-aligned III-V MOS processes must therefore be developed. Here we report a 60 nm L_g In_0.53Ga_0.47As MOSFET fabricated in a gate-first process with self-aligned raised InAs S/D access regions formed by MBE regrowth. The devices have a peak drive current of 1.36 mA/μm at V_ds = 1.25 V and V_gs = 3 V and an R_on = 341 ohm-μm. To our knowledge this is the lowest R_on and smallest L_g reported to date for In_0.53Ga_0.47As surface channel MOSFETs.