DocumentCode :
2902622
Title :
Multi circular buffer controller chip for advanced ESM system
Author :
Godon, F. ; Al-Khalili, D. ; Inkol
Author_Institution :
Dept. of Electr. & Comput. Eng., R. Mil. Coll. of Canada, Kingston, Ont., Canada
fYear :
1990
fDate :
17-21 Sep 1990
Abstract :
A 90 K transistor 1.5 μm CMOS integrated circuit that operates at a data transfer rate of 20 MHz and implements an array of variable size circular buffers mapped into a high-speed RAM through physical and virtual addressing techniques is discussed. The device is fully programmable with the capability of single and block data transfers. The target application is an advanced multiprocessor ESM system
Keywords :
CMOS integrated circuits; buffer storage; electronic warfare; storage management chips; 1.5 micron; CMOS integrated circuit; advanced ESM system; block data transfers; data transfer rate; high-speed RAM; multiprocessor; physical addressing; variable size circular buffers; virtual addressing; Buffer storage; Computer architecture; Control systems; Counting circuits; Logic arrays; Pulse measurements; Random access memory; Read-write memory; Registers; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC Seminar and Exhibit, 1990. Proceedings., Third Annual IEEE
Conference_Location :
Rochester, NY
Type :
conf
DOI :
10.1109/ASIC.1990.186190
Filename :
186190
Link To Document :
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