• DocumentCode
    2904889
  • Title

    Any-size instruction abbreviation technique for embedded DSPs

  • Author

    Pechanek, G.G. ; Larin, Sergei ; Conte, Thomas

  • fYear
    2002
  • fDate
    25-28 Sept. 2002
  • Firstpage
    8
  • Lastpage
    12
  • Abstract
    There exist a whole class of systems, which presents critical requirements for code density, efficient memory usage, low power and performance. A representative of this class are embedded DSP systems for SOC. This work presents a method for entropy-bounded encoding of an original ISA and decoupling it from a DSP core. The encoding allows the instruction storage to be used with high efficiency, which is only bounded by the information contents of an application, and relaxes any restrictions imposed on the ISA by the physical memory and branching mechanism. The concept is illustrated with an exemplary commercial DSP processor showing a reduction of the required instruction memory space of greater than 40% without significant impact on the instruction fetch stage of the DSP pipeline.
  • Keywords
    digital signal processing chips; entropy codes; low-power electronics; pipeline processing; system-on-chip; ISA; SOC; any-size instruction abbreviation technique; code density; commercial DSP processor; embedded DSPs; entropy-bounded encoding; instruction memory space; instruction storage; low power; memory usage; performance; pipeline; Computer hacking; Decoding; Digital signal processing; Encoding; Hardware; Information entropy; Instruction sets; Modems; Pipelines;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC/SOC Conference, 2002. 15th Annual IEEE International
  • Print_ISBN
    0-7803-7494-0
  • Type

    conf

  • DOI
    10.1109/ASIC.2002.1158022
  • Filename
    1158022